Sunsynk SSLB1 Parallel Battery Comms Fix for More Than 5 Units

Key Takeaways

• Paralleling more than five Sunsynk SSLB1 batteries induces cumulative capacitive interference across unused patch lead cores, freezing interlink communication.
• Resolving communication drops requires modifying the specific interlink cable running between battery 5 and battery 6.
• The modified cable must retain only two active conductors: RS485-A and RS485-B on Pins 2 and 3 (or Pins 7 and 6), with all remaining six cores severed.
• Daisy-chain routing must follow the recommended port orientation: data IN on the right-hand socket and data OUT on the left-hand socket.
• Always isolate the main DC battery breaker and ensure all modules are switched off before modifying communication wiring.

Why Large SSLB1 Parallel Battery Banks Lose Communication

In high-capacity residential estates, commercial office parks, and agricultural microgrids across South Africa, expanding low-voltage lithium battery banks is a standard method for surviving extended load-shedding stages. The Sunsynk SSLB1 (rack-mounted low-voltage lithium iron phosphate module) is one of the most widely deployed energy storage units in the country. Installers frequently scale these systems by paralleling multiple modules onto heavy common DC busbars to support commercial hybrid inverters.

However, technicians constructing battery banks exceeding five units routinely encounter a critical communication breakdown. While systems with two, three, four, or five batteries operate seamlessly, adding a sixth battery often results in total communication loss across the entire stack. The inverter LCD suddenly reports missing battery management system (BMS) data, generates communication failure warnings, and defaults to conservative lead-acid voltage parameters.

The internal battery management system (BMS) in each Sunsynk SSLB1 module communicates with adjacent modules via an internal differential RS485 serial bus. The master battery module aggregates state of charge (SOC), cell voltage, pack temperature, and real-time charging/discharging current limits from all downstream slave units, packaging this consolidated telemetry into a CAN bus frame sent directly to the hybrid inverter.

When connecting more than 5x SSLB1 batteries in parallel it often results in interference along the comms cables which stops all interlink communications between the batteries.

The physical mechanism driving this communication drop is capacitive loading and signal reflection across standard Category 5 or Category 6 patch cables. Off-the-shelf Ethernet patch leads contain eight copper conductors arranged in four twisted pairs. In an SSLB1 interlink cable, only two conductors carry active differential serial data (RS485-A and RS485-B). The remaining six conductors float or terminate into auxiliary circuit traces on the battery interface printed circuit board (PCB).

As the number of paralleled battery modules increases beyond five, the cumulative capacitance of these unused, ungrounded conductors creates an antenna effect. High-frequency electromagnetic noise emitted by the inverter's high-speed insulated-gate bipolar transistor (IGBT) switching stages couples into the open cores. The induced noise voltage overwhelms the differential signal threshold of the RS485 transceiver ICs, corrupting packet checksums and causing the entire daisy-chain to freeze.

Battery Interlink Architecture: Master Crossover vs Slave Straight Patch

To execute the hardware modification correctly, installers must first understand the fundamental structural difference between the primary inverter communication cable and inter-battery slave cables.

```
+---------------------+-------------------+---------------------+

+---------------------+-------------------+---------------------+

+---------------------+-------------------+---------------------+
```

The Inverter-to-Master Crossover Cable

The cable linking the hybrid inverter's BMS or CAN port to the master battery module is not a standard network patch lead. The inverter to master battery cable is a crossover cable, pin outs can be found in our knowledge base article SSLB1 - Battery Communication Cables. This cable routes specific inverter processor pins (such as CAN-High on Pin 4 and CAN-Low on Pin 5) to the corresponding communication input pins on the master battery front panel.

The Slave-to-Slave Interlink Leads

By contrast, cables linking individual battery modules to one another use standard wiring. The battery to battery comms cables are straight patch through leads (no crossover of pins) connected to the ports marked CAN/RS485 , however for the cable between battery 5 and battery 6 you must strip away the unused cores to prevent the interference.

Standard straight-through patch leads (wired pin 1-to-1, pin 2-to-2, through to pin 8-to-8) work reliably between Battery 1 and Battery 2, Battery 2 and Battery 3, Battery 3 and Battery 4, and Battery 4 and Battery 5. The signal corruption barrier manifests specifically as the serial bus spans into the second half of the battery bank.

Pinpointing the Cable 5-to-6 Modification Point

Because electromagnetic noise accumulation reaches critical threshold limits beyond five units, the physical cable running between the fifth and sixth battery modules must be altered.

In order to overcome this a change must be made to the parallel comms cable between battery 5 and battery 6.

Modifying any cable earlier in the chain (for example, between Battery 1 and 2, or Battery 2 and 3) is ineffective, as noise accumulation across downstream modules will still corrupt communication at the far end of the bank. Modifying the single link between module 5 and module 6 acts as a physical noise barrier, isolating high-frequency capacitive coupling while allowing pure differential serial data to pass through unimpeded.

Step-by-Step Cable 5-to-6 Core Stripping Procedure

Fabricating the modified communication link requires a length of Cat5e or Cat6 solid copper cable, two standard RJ45 modular plugs, a cable stripper, and a ratcheting crimping tool.

```
MODIFIED 2-CORE INTERLINK CABLE (BATTERY 5 TO 6)

RJ45 Plug A RJ45 Plug B
+---------+ +---------+
| Pin 1 | [CUT & ISOLATED] | Pin 1 |
| Pin 2 |================================| Pin 2 | RS485-A
| Pin 3 |================================| Pin 3 | RS485-B
| Pin 4 | [CUT & ISOLATED] | Pin 4 |
| Pin 5 | [CUT & ISOLATED] | Pin 5 |
| Pin 6 | [CUT & ISOLATED] | Pin 6 |
| Pin 7 | [CUT & ISOLATED] | Pin 7 |
| Pin 8 | [CUT & ISOLATED] | Pin 8 |
+---------+ +---------+
Only 2 Conductors Connected!
```

Pinout Selection Options

The SSLB1 communication port provides two alternative pinout pairings for the internal RS485 interlink bus. The two pins which should remain connected by the two cores from a CAT 5 or CAT 6 cable are the RS485-A and RS485-B which uses pins 2 and 3 (2=A and 3=B) or pins 6 and 7 (6=B and 7=A) and the other cores must be terminated so that they are not making a connection to the RJ45 connector.

Step-by-Step Fabrication Instructions

1. Cut a suitable length of Cat5e or Cat6 cable (typically 250mm to 350mm for standard 19-inch battery server rack installations).
2. Strip approximately 40mm of the outer PVC protective jacket from both ends of the cable.
3. Untwist the conductor pairs. If selecting the Pin 2 and Pin 3 configuration, identify the Orange pair (Orange/White and Orange) or Green pair.
4. Carefully snip away all other six copper conductors flush with the outer PVC jacket at both ends of the cable run. Ensure the cut copper ends cannot contact the RJ45 gold pins or each other.
5. Straighten the two remaining active conductors and align them into Pin 2 and Pin 3 of the RJ45 modular plug:

• Conductor A (e.g. Orange/White) inserted into Pin 2 (RS485-A).
• Conductor B (e.g. Orange solid) inserted into Pin 3 (RS485-B).
• Verify that channels 1, 4, 5, 6, 7, and 8 inside the clear RJ45 plug housing remain completely empty.

6. Insert the conductors fully until they seat firmly against the front face of the connector, then crimp the modular plug using a precision ratcheting crimp tool.
7. Repeat the exact identical pinout alignment on the opposite connector (Pin 2 to Pin 2, Pin 3 to Pin 3) to preserve the straight-through polarity.
8. Use a digital continuity multimeter to verify zero resistance between Pin 2 on both ends, zero resistance between Pin 3 on both ends, and infinite resistance (open circuit) across all other pins.

Recommended RJ45 Port Daisy-Chain Orientation

In addition to stripping unused copper cores, physical port routing orientation plays a critical role in preserving signal integrity across large parallel banks.

Each Sunsynk SSLB1 front panel features two identical RJ45 modular sockets labelled CAN/RS485. While these internal sockets are electrically linked in parallel on the internal PCB, trace routing impedance is not symmetrical.

It is also recommended to have the parallel comms cables running IN to the right hand side CAN/RS485 port (closest to the green dry connector strip) and running OUT of the left hand side.

```
SSLB1 FRONT PANEL COMMUNICATION PORT ORIENTATION

+-------------------------------------------------------+
| [LEFT PORT] [RIGHT PORT] [DRY CONTACTS] |
| CAN/RS485 CAN/RS485 [ = = = = = ] |
| |
| DATA OUT ------------> DATA IN |
| (To Next Slave) (From Previous) |
+-------------------------------------------------------+
```

Standardized Routing Rule Across the Bank

• Master Module (Battery 1): The crossover cable from the hybrid inverter connects into the master communication port. The slave daisy-chain cable plugs into the LEFT port (Data OUT) and routes downward to Battery 2.
• Slave Modules (Battery 2 through N): Incoming communication cables must enter the RIGHT port (closest to the green dry contact block). The outgoing cable to the subsequent slave must exit the LEFT port.
• Between Battery 5 and Battery 6: The custom modified 2-core cable connects from the LEFT port of Battery 5 into the RIGHT port of Battery 6.
• Remaining Slaves (Battery 6 through N): Resume standard straight-through patch leads, strictly observing the right-hand IN and left-hand OUT convention until reaching the final battery module.

DIP Switch Addressing and Final System Recommissioning

After installing the modified 2-core communication cable, configure the binary hardware DIP switches on each battery module front panel:

1. Master Battery (Unit 1): Set DIP switch address to 0001 (binary 1).
2. Slave Batteries (Units 2 through N): Assign consecutive binary addresses:

• Battery 2: 0010 (binary 2)
• Battery 3: 0011 (binary 3)
• Battery 4: 0100 (binary 4)
• Battery 5: 0101 (binary 5)
• Battery 6: 0110 (binary 6)
• Continue sequentially up to the final module in the stack.

3. Power on all battery modules sequentially, starting with Battery 1 and proceeding down to the final slave. Allow 30 seconds for the internal BMS processors to complete network discovery.
4. Power on the hybrid inverter and navigate to Settings > Li BMS > Details Data.
5. Verify that the inverter successfully detects every connected module. Use the on-screen scroll arrows to cycle through all units, confirming that individual pack voltages, temperatures, and state-of-charge figures are updating in real time.

By eliminating capacitive coupling with a custom two-wire RS485 interlink between modules 5 and 6, installers can deploy high-capacity Sunsynk SSLB1 battery arrays with rock-solid communication stability across demanding South African solar microgrids.